In certain power amplifiers (PAs) and other circuitry, an output stage or network may combine powers from multiple gain stages in order to obtain a single power output. One or more transformers can be used to magnetically combine the output powers to be provided to a load, e.g., an antenna. For many reasons, the amount of power lost in the transformer should be minimized. To reduce power dissipation in such a structure, oftentimes the transformer can be tuned using capacitors coupled to the transformer, namely matching capacitors provided at the input and the output of the transformer. In addition to intentional capacitances added into a circuit, parasitic capacitances may also be present due to various capacitances inherent in an integrated circuit (IC). For example, a transformer can be formed of windings formed on different layers of a semiconductor die. There can be parasitic capacitance in between these winding layers. Such parasitic capacitance can impact the operation of the transformer.
One example of a simple output network is a transformer having a primary coil (L1) coupled to an output of a gain stage (e.g., a differential output) and that is magnetically coupled to a secondary coil (L2) that in turn is electrically coupled to an output load, e.g., an antenna. In order to maximize the power transfer to the load, the transformer may be bi-conjugately matched. This matching can be realized via parallel capacitors coupled in parallel to both the primary coil and the secondary coil. Methods of calculating the values of such capacitances can be accomplished using well known techniques, e.g., performing an LC calculation between the inductance and capacitance, based on a desired frequency of operation. However, in addition to these intentional capacitances, parasitic capacitances may be present, causing the transformer to respond to common mode voltages, which causes the resulting circuit to vary from the designed intentional capacitor values, causing power dissipation and possibly variations in tuning.